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User forums => Help => Topic started by: tsukanomon on May 02, 2010, 04:00:25 am

Title: Verilog...project
Post by: tsukanomon on May 02, 2010, 04:00:25 am

Hello World!!!!!!!!....lol
Hello Guyz, i dont know if its possible but can u help me with code blocks+verilog?

I started a few days ago programming in Verilog, and i always used code blocks with C/C++ projects but i couldnt find the verilog project, is that a extra plugin or something like that?

What do i have to do to create a verilog project like i did with my C/C++ projects?
and if its possible too, how do i compile or create a wave forms in code blocks for my verilog projects??

thks guyzzzz

Title: Re: Verilog...project
Post by: danselmi on May 02, 2010, 06:42:41 pm

Verilog is not (yet) supported directly by Code::Blocks. At work I  use the PowerShell plugin http://forums.codeblocks.org/index.php/topic,10060.0.html (http://forums.codeblocks.org/index.php/topic,10060.0.html) for VHDL and Verilog.

Title: Re: Verilog...project
Post by: tsukanomon on May 03, 2010, 02:49:16 am

ok i installed the power shell plugin wich i downloaded from BerliOS....but now how can i use that???

Title: Re: Verilog...project
Post by: danselmi on May 04, 2010, 07:31:21 pm

In the manual http://www.codeblocks.org/docs/manual_en.pdf (http://www.codeblocks.org/docs/manual_en.pdf), the documentation about the ShellExtension plugin still applies to PowerShell plugin.