Oh, I'll also point out that C::B's code completion doesn't seem to like the way cc65 sets up hardware registers. cc65 defines a structure that overlays the memory mapped registers (for instance, in _6526.h you'll find the structure definition for __6526, which is the CIA chip for the C64). Then in c64.h, it sets up #defines like this:
#include <_6526.h>
#define CIA1 (*(struct __6526*)0xDC00)
#define CIA2 (*(struct __6526*)0xDD00)
So, in theory, you should be able to type "CIA1." and have code completion come up with suggestions like "ddra", "pra", etc (members of the __6526 structure). This doesn't work, and I can see why the parser might not follow all those links...
I've actually replaced this for two reasons. The first is that my replacement works better with C::B's completion, and the second is that I seemed to be having some issues with what I think was compiler optimizations (or maybe I was just doing something stupid -- I won't rule out that possibility). When I tried to write "CIA2.pra |= 0x30;" or something like it, the result would be incorrect, as if the processor didn't actually read, or maybe didn't actually write. (As I say, I may have screwed up something with the data-direction registers, instead, so take this with a grain of salt)
But since the improved code completion is quite nice, it doesn't really matter if the "correctness fix" part wasn't needed. I've just got these simple #defines (I'll include 'em all, so you can just use 'em if you like). They work great, and code completion understands them perfectly. The only difference is that I have to use VIC_spr0_x instead of VIC.spr0_x, and I can live with that. I #undef the symbols as defined by <c64.h>, since I'm not using them.
(Hopefully I'm still on (or near) topic, as this is a workaround for code completion issues)
#define REG(B,O) *((unsigned char *)((B) + (O)))
#undef VIC
#define VIC 0xD000
#define VIC_spr0_x REG(VIC, 0) /* Sprite 0, X coordinate d000 53248 */
#define VIC_spr0_y REG(VIC, 1) /* Sprite 0, Y coordinate d001 53249 */
#define VIC_spr1_x REG(VIC, 2) /* Sprite 1, X coordinate d002 53250 */
#define VIC_spr1_y REG(VIC, 3) /* Sprite 1, Y coordinate d003 53251 */
#define VIC_spr2_x REG(VIC, 4) /* Sprite 2, X coordinate d004 53252 */
#define VIC_spr2_y REG(VIC, 5) /* Sprite 2, Y coordinate d005 53253 */
#define VIC_spr3_x REG(VIC, 6) /* Sprite 3, X coordinate d006 53254 */
#define VIC_spr3_y REG(VIC, 7) /* Sprite 3, Y coordinate d007 53255 */
#define VIC_spr4_x REG(VIC, 8) /* Sprite 4, X coordinate d008 53256 */
#define VIC_spr4_y REG(VIC, 9) /* Sprite 4, Y coordinate d009 53257 */
#define VIC_spr5_x REG(VIC, 10) /* Sprite 5, X coordinate d00a 53258 */
#define VIC_spr5_y REG(VIC, 11) /* Sprite 5, Y coordinate d00b 53259 */
#define VIC_spr6_x REG(VIC, 12) /* Sprite 6, X coordinate d00c 53260 */
#define VIC_spr6_y REG(VIC, 13) /* Sprite 6, Y coordinate d00d 53261 */
#define VIC_spr7_x REG(VIC, 14) /* Sprite 7, X coordinate d00e 53262 */
#define VIC_spr7_y REG(VIC, 15) /* Sprite 7, Y coordinate d00f 53263 */
#define VIC_spr_hi_x REG(VIC, 16) /* High bits of X coordinate d010 53264 */
#define VIC_ctrl1 REG(VIC, 17) /* Control register 1 d011 53265 */
#define VIC_rasterline REG(VIC, 18) /* Current raster line d012 53266 */
#define VIC_strobe_x REG(VIC, 19) /* Light pen, X position d013 53267 */
#define VIC_strobe_y REG(VIC, 20) /* Light pen, Y position d014 53268 */
#define VIC_spr_ena REG(VIC, 21) /* Enable sprites d015 53269 */
#define VIC_ctrl2 REG(VIC, 22) /* Control register 2 d016 53270 */
#define VIC_spr_exp_y REG(VIC, 23) /* Expand sprites in Y dir d017 53271 */
#define VIC_addr REG(VIC, 24) /* Address of chargen and video ram d018 53272 */
#define VIC_irr REG(VIC, 25) /* Interrupt request register d019 53273 */
#define VIC_imr REG(VIC, 26) /* Interrupt mask register d01a 53274 */
#define VIC_spr_bg_prio REG(VIC, 27) /* Priority to background d01b 53275 */
#define VIC_spr_mcolor REG(VIC, 28) /* Sprite multicolor bits d01c 53276 */
#define VIC_spr_exp_x REG(VIC, 29) /* Expand sprites in X dir d01d 53277 */
#define VIC_spr_coll REG(VIC, 30) /* Sprite/sprite collision reg d01e 53278 */
#define VIC_spr_bg_coll REG(VIC, 31) /* Sprite/background collision reg d01f 53279 */
#define VIC_bordercolor REG(VIC, 32) /* Border color d020 53280 */
#define VIC_bgcolor0 REG(VIC, 33) /* Background color 0 d021 53281 */
#define VIC_bgcolor1 REG(VIC, 34) /* Background color 1 d022 53282 */
#define VIC_bgcolor2 REG(VIC, 35) /* Background color 2 d023 53283 */
#define VIC_bgcolor3 REG(VIC, 36) /* Background color 3 d024 53284 */
#define VIC_spr_mcolor0 REG(VIC, 37) /* Color 0 for multicolor sprites d025 53285 */
#define VIC_spr_mcolor1 REG(VIC, 38) /* Color 1 for multicolor sprites d026 53286 */
#define VIC_spr0_color REG(VIC, 39) /* Color sprite 0 d027 53287 */
#define VIC_spr1_color REG(VIC, 40) /* Color sprite 1 d028 53288 */
#define VIC_spr2_color REG(VIC, 41) /* Color sprite 2 d029 53289 */
#define VIC_spr3_color REG(VIC, 42) /* Color sprite 3 d02a 53290 */
#define VIC_spr4_color REG(VIC, 43) /* Color sprite 4 d02b 53291 */
#define VIC_spr5_color REG(VIC, 44) /* Color sprite 5 d02c 53292 */
#define VIC_spr6_color REG(VIC, 45) /* Color sprite 6 d02d 53293 */
#define VIC_spr7_color REG(VIC, 46) /* Color sprite 7 d02e 53294 */
#undef CIA1
#define CIA1 0xDC00
#define CIA1_pra REG(CIA1, 0) /* Port register A */
#define CIA1_prb REG(CIA1, 1) /* Port register B */
#define CIA1_ddra REG(CIA1, 2) /* Data direction register A */
#define CIA1_ddrb REG(CIA1, 3) /* Data direction register B */
#define CIA1_ta_lo REG(CIA1, 4) /* Timer A, low byte */
#define CIA1_ta_hi REG(CIA1, 5) /* Timer A, high byte */
#define CIA1_tb_lo REG(CIA1, 6) /* Timer B, low byte */
#define CIA1_tb_hi REG(CIA1, 7) /* Timer B, high byte */
#define CIA1_tod_10 REG(CIA1, 8) /* TOD, 1/10 sec. */
#define CIA1_tod_sec REG(CIA1, 9) /* TOD, seconds */
#define CIA1_tod_min REG(CIA1, 10) /* TOD, minutes */
#define CIA1_tod_hour REG(CIA1, 11) /* TOD, hours */
#define CIA1_sdr REG(CIA1, 12) /* Serial data register */
#define CIA1_icr REG(CIA1, 13) /* Interrupt control register */
#define CIA1_cra REG(CIA1, 14) /* Control register A */
#define CIA1_crb REG(CIA1, 15) /* Control register B */
#undef CIA2
#define CIA2 0xDD00
#define CIA2_pra REG(CIA2, 0) /* Port register A */
#define CIA2_prb REG(CIA2, 1) /* Port register B */
#define CIA2_ddra REG(CIA2, 2) /* Data direction register A */
#define CIA2_ddrb REG(CIA2, 3) /* Data direction register B */
#define CIA2_ta_lo REG(CIA2, 4) /* Timer A, low byte */
#define CIA2_ta_hi REG(CIA2, 5) /* Timer A, high byte */
#define CIA2_tb_lo REG(CIA2, 6) /* Timer B, low byte */
#define CIA2_tb_hi REG(CIA2, 7) /* Timer B, high byte */
#define CIA2_tod_10 REG(CIA2, 8) /* TOD, 1/10 sec. */
#define CIA2_tod_sec REG(CIA2, 9) /* TOD, seconds */
#define CIA2_tod_min REG(CIA2, 10) /* TOD, minutes */
#define CIA2_tod_hour REG(CIA2, 11) /* TOD, hours */
#define CIA2_sdr REG(CIA2, 12) /* Serial data register */
#define CIA2_icr REG(CIA2, 13) /* Interrupt control register */
#define CIA2_cra REG(CIA2, 14) /* Control register A */
#define CIA2_crb REG(CIA2, 15) /* Control register B */
